1. Field of the Invention
This invention relates to a process for separating a solar cell or a thin-film semiconductor incorporated with a thin-type circuit such as an area sensor, a process for producing such a thin-film semiconductor, a process for producing a solar cell, and a process for forming a semiconductor such as a photoelectric transducer.
2. Related Background Art
Solar cells are widely researched as clean power sources which are utilized as energy sources in various devices or which can be systematically connected to commercial electric power sources.
Because of a demand for cost advantages, solar cells are so desired that devices can be formed on low-cost substrates. Meanwhile, silicon is commonly used as the semiconductor that constitutes solar cells. In particular, from the viewpoint of the efficiency of converting light energy to an electromotive force, i.e., photoelectric conversion efficiency, single-crystal silicon excels most. However, from the viewpoint of making large-area and low-cost solar cells, amorphous silicon is considered advantageous. Also, in recent years, the use of polycrystalline silicon has been studied for the purpose of achieving a low cost comparable to amorphous silicon and a high energy conversion efficiency comparable to single-crystal silicon.
However, in processes hitherto proposed on such single-crystal silicon and polycrystalline silicon, an ingot is sliced into sheet-like substrates, and hence, it has been difficult to make them in a thickness of 0.3 mm or smaller. Thus, the substrates have had an excessive thickness for absorbing a sufficient amount of light, and hence no effective utilization of materials has been made. That is, in order to make solar cells inexpensive, they must be made more thin-gaged. Recently, a process has been proposed in which a droplet of fused silicon is cast in a mold and a silicon sheet is formed by spin processing. Its thickness, however, is about 0.1 mm to 0.2 mm, which is still not sufficiently thin, compared with the layer thickness (20 .mu.m to 50 .mu.m) necessary and sufficient for the absorption of light as crystalline silicon. Also such a silicon sheet does not bring about a cost reduction or provide flexibility.
Accordingly, in order to make solar cells more thin-gaged, it has been proposed that a thin-film epitaxial layer grown on a single-crystal silicon substrate is separated (peeled) from the substrate and is used in solar cells so that a high energy conversion efficiency and a cost reduction can be achieved (Milnes, A. G. and Feucht, D. L., "Peeled Film Technology Solar Cells", IEEE Photovoltaic Specialist Conference, p.338, 1975).
In the above process, however, it is necessary to insert an SiGe intermediate layer between the substrate single-crystal silicon and the grown epitaxial layer to effect heteroepitaxial growth, and it is further necessary to selectively melt this intermediate layer to peel the grown layer. In general, in the case of heteroepitaxial growth, defects tend to occur at growth interfaces because of a difference in lattice constant. Also, this process can not be said to be advantageous in process cost because materials of different types are used.
It is reported that a thin-film crystalline solar cell can be obtained by a process disclosed in U.S. Pat. No. 4,816,420, i.e., a process for producing solar cells which is characterized by forming a sheet-like crystal on a crystalline substrate by selective epitaxial growth and lateral growth via a masking material and thereafter peeling it from the substrate.
In the above process, however, an opening made in the masking material is in the form of a line. To separate from such a line seed the sheet-like crystal grown by selective epitaxial growth and lateral growth, the cleavage of crystal is utilized to peel it mechanically. Thus, a line seed having a shape larger than a certain size comes into contact with the substrate in a large area, and hence may cause a break of the sheet-like crystal in the course of peeling. Especially in the case when solar cells are made to have a large area, a line length of several mm to several cm or larger than that causes a fatal problem, however narrow the line is made (in practice, about 1 .mu.m).
Taking account of such a point, Japanese Patent Application Laid-open No. 5-283722 discloses that a porous silicon layer is formed on the surface of a silicon wafer by anodizing, an insulating layer is deposited on the porous layer, thereafter only part of the insulating layer is left by patterning, thereafter a silicon layer is grown by selective epitaxial growth on the porous layer in its areas other than the insulating layer, and the insulating layer and porous layer are removed by etching through gaps formed on the insulating layer, to peel the silicon layer from the wafer. Thus, using this layer, a thin-film crystalline solar cell showing good characteristics can be produced.
Even the above process, however, makes it necessary to provide the step of forming the insulating layer and the step of patterning the insulating layer by photolithography, and hence still can not be said to promise a sufficiently low process cost for solar cells. Also, because of the selective epitaxial growth, silicon is not deposited on the insulating layer, and therefore an epitaxial layer having openings is formed, so that abnormal growth tends to take place around the openings to cause a leak current after the formation of a junction in some cases.
In order to materialize thin-film silicon solar cells, Mitsubishi Denki Giho (Mitsubishi Electric Technical Report, vol. 1, 69, no. 6, 1995) discloses that a thin-film polycrystalline silicon layer serving as an electricity generation layer is formed on an SiO.sub.2 film on a silicon substrate, and the SiO.sub.2 film is etched using through holes called via holes to remove the thin-film polycrystalline silicon. FIGS. 31A to 31F are cross-sectional views showing production steps of this process.
First, as shown in FIG. 31A, a thin-film polycrystalline silicon layer 1404 of about 100 .mu.m thick is formed on a substrate 1401 covered with an SiO.sub.2 layer 1402. Next, as shown in FIG. 31B, through holes 1406 are selectively formed by etching, and then a textured structure 1420 is formed. Thereafter, as shown in FIG. 31C, with immersion in hydrofluoric acid, part of the SiO.sub.2 layer 1402 around the through holes 1406 is etched, and thereafter phosphorus is diffused to form an n-type region 1421 on the surface of the layer 1404, on the wall surfaces of the through holes 1406 and also, through the through holes, on the back side around the through holes.
Thereafter, again with immersion in hydrofluoric acid, the remaining SiO.sub.2 layer 1402 is etched to separate the thin-film polycrystalline silicon layer 1404 from the substrate 1401 as shown in FIG. 31D. The substrate 1401 is returned to the initial step of forming the thin-film polycrystalline silicon layer 1404 so as to be reused. To the thin-film polycrystalline silicon layer 1404 thus separated, a glass 1423 is attached with a transparent resin 1422 as shown in FIG. 31E. Then, as shown in FIG. 31F, a p-type electrode 1424 and an n-type electrode 1425 are formed on the back side. Thus, a solar cell unit cell is completed.
In order to materialize thin-film silicon solar cells, Japanese Patent Application Laid-open No. 8-213645 also discloses that a thin-film polycrystalline silicon layer is separated by utilizing an epitaxial layer formed on a porous silicon layer. FIG. 32 is a cross-sectional view showing a production step of this process. In FIG. 32, reference numeral 1601 denotes a silicon wafer; 1602, a porous silicon layer; 1603, a p.sup.+ -type silicon layer; 1604, a p-type silicon layer; 1605, an n.sup.+ -type silicon layer; 1606, a protective layer; 1607, adhesive materials; and 1608 and 1609, jigs. In this production process, first the silicon wafer 1601 is anodized to form the porous silicon layer 1602 on the surface. Thereafter, on the porous silicon layer 1602, the p.sup.+ -type silicon layer 1603, the p-type silicon layer 1604, and the n.sup.+ -type silicon layer 1605 are formed in this order by epitaxial growth. Then, the surface is covered with the protective layer 1606, and the jigs 1608 and 1609 are bonded to both sides via the adhesive materials 1607. A tensile force is applied to the jigs 1608 to separate the p.sup.+ -type silicon layer 1603, the p-type silicon layer 1604 and the n.sup.+ -type silicon layer 1605 from the silicon wafer 1601 at the porous silicon layer 1602. Then, the publication discloses that the p.sup.+ -type silicon layer 1603, the p-type silicon layer 1604 and the n.sup.+ -type silicon layer 1605 are used as a flexible thin-film solar cell.
In solar cells, however, the production process as disclosed in Japanese Patent Application Laid-open No. 8-213645 does not always enable clean separation at the porous silicon layer 1602. Hence, cracks are often produced in the epitaxial layer, resulting in a great possibility of low yield. Also, since in this process the porous silicon layer is separated by applying a tensile force, a strong adhesion is required between the jig and the single-crystal silicon layer. Thus, the process is not suited for mass production of solar cells.
The process disclosed in the aforesaid Mitsubishi Electric Technical Report also can only produce polycrystalline-type solar cells, and hence may achieve a poor conversion efficiency compared with the case of single-crystal type solar cells.
In addition, in both the processes for producing thin-film solar cells, the processing is performed only on one side of the silicon substrate. Thus, there is room for improvement in respect of production efficiency.